AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     1


MACRO ASSEMBLER AX51 V3.01
OBJECT MODULE PLACED IN L51IBank.OBJ
ASSEMBLER INVOKED BY: C:\keil\C51\BIN\AX51.EXE L51IBank.a51 SET(SMALL) DEBUG EP

LOC    OBJ             LINE     SOURCE

                          1     $nomod51  NOLINES
                          2     $nocond 
                          3     ;------------------------------------------------------------------------------
                          4     ;  This file is part of the LX51 Banked Linker/Locater package
                          5     ;  Copyright (c) 1988 - 2005 Keil Elektronik GmbH and Keil Software, Inc.
                          6     ;  Version 1.00 (Code and Variable Banking for Mentor M8051EW based devices)
                          7     ;------------------------------------------------------------------------------
                          8     ;
                          9     ;  This file implements code and variable banking for Mentor M8051EW based
                         10     ;  devices, which offer three memory extension registers MEX1, MEX2 and MEX3.
                         11     ;  *** Important Notes ***  
                         12     ;
                         13     ;  1.  Full support for Mentor M8051EW based devices requires the LX51 linker/
                         14     ;      locater.  This file does not work with the BL51 linker/locater.
                         15     ;
                         16     ;  2.  The C51 Compiler must be invoked with the directive VARBANKING(1)
                         17     ;      in order to use this file.   It is unimportant if you are using 
                         18     ;      variable banking (far memory type) in your application.
                         19     ;
                         20     ;  3.  This file contains also the CPU startup code
                         21     ;  
                         22     ;  4.  You need to use the C51 run-time library files C51M*.LIB.
                         23     ;
                         24     ;************************ Configuration Section *******************************
 0004                    25     ?B_NBANKS       EQU  4    ; Define maximum Number of Banks                    *
                         26     ;                         ; following values are allowed: 2 .. 16             *
                         27     ;                                                                             *
 0003                    28     ?B_CB           EQU  3    ; Define Memory Bank used for constants             *
                         29     ;                         ; following values are allowed: 0 .. 7              *
                         30     ;                         ; The value 0xFF uses the current program code bank *
                         31     ;                         ; as constant bank                                  *
                         32     ;                                                                             *
 0001                    33     ?B_VAR_BANKING  EQU  1    ; XDATA Variable Banking (far memory type support)  *
                         34     ;                         ; 0 XDATA Variable Banking no required              *
                         35     ;                         ; 1 XDATA Variable Banking uses this L51IBANK.A51   *
                         36     ;                         ;   module                                          *
                         37     ; Notes: ?B_VAR_BANKING uses the C51 'far' memory type to extent the space    *
                         38     ;        for variables in RAM space of the M8051EW device.                    *
                         39     ;                                                                            *
                         40     ;******************************************************************************
                         41     ;------------------------- CPU STARTUP CONFIGURATION --------------------------
                         42     ;
                         43     ;  User-defined Power-On Initialization of Memory
                         44     ;
                         45     ;  With the following EQU statements the initialization of memory
                         46     ;  at processor reset can be defined:
                         47     ;
                         48     ;               ; the absolute start-address of IDATA memory is always 0
 0080                    49     IDATALEN        EQU     80H     ; the length of IDATA memory in bytes.
                         50     ;
 0000                    51     XDATASTART      EQU     0H      ; the absolute start-address of XDATA memory
 0000                    52     XDATALEN        EQU     0H      ; the length of XDATA memory in bytes.
                         53     ;
 0000                    54     PDATASTART      EQU     0H      ; the absolute start-address of PDATA memory
 0000                    55     PDATALEN        EQU     0H      ; the length of PDATA memory in bytes.
                         56     ;
                         57     ;  Notes:  The IDATA space overlaps physically the DATA and BIT areas of the
                         58     ;          8051 CPU. At minimum the memory space occupied from the C51 
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     2

                         59     ;          run-time routines must be set to zero.
                         60     ;------------------------------------------------------------------------------
                         61     ;
                         62     ;  Reentrant Stack Initilization
                         63     ;
                         64     ;  The following EQU statements define the stack pointer for reentrant
                         65     ;  functions and initialized it:
                         66     ;
                         67     ;  Stack Space for reentrant functions in the SMALL model.
 0000                    68     IBPSTACK        EQU     0       ; set to 1 if small reentrant is used.
 0100                    69     IBPSTACKTOP     EQU     0FFH+1  ; set top of stack to highest location+1.
                         70     ;
                         71     ;  Stack Space for reentrant functions in the LARGE model.      
 0000                    72     XBPSTACK        EQU     0       ; set to 1 if large reentrant is used.
 00010000                73     XBPSTACKTOP     EQU     0FFFFH+1; set top of stack to highest location+1.
                         74     ;
                         75     ;  Stack Space for reentrant functions in the COMPACT model.    
 0000                    76     PBPSTACK        EQU     0       ; set to 1 if compact reentrant is used.
 00010000                77     PBPSTACKTOP     EQU     0FFFFH+1; set top of stack to highest location+1.
                         78     ;
                         79     ;------------------------------------------------------------------------------
                         80     ;
                         81     ;  Page Definition for Using the Compact Model with 64 KByte xdata RAM
                         82     ;
                         83     ;  The following EQU statements define the xdata page used for pdata
                         84     ;  variables. The EQU PPAGE must conform with the PPAGE control used
                         85     ;  in the linker invocation.
                         86     ;
 0000                    87     PPAGEENABLE     EQU     0       ; set to 1 if pdata object are used.
                         88     ;
 0000                    89     PPAGE           EQU     0       ; define PPAGE number.
                         90     ;
 00A0                    91     PPAGE_SFR       DATA    0A0H    ; SFR that supplies uppermost address byte
                         92     ;               (most 8051 variants use P2 as uppermost address byte)
                         93     ;
                         94     ;------------------------------------------------------------------------------
                         95     
                         96                     NAME    ?BANK?SWITCHING
                         97     
                         98     
                         99     ;******************************************************************************
                        100     ;                                                                             *
                        101     ; THEORY OF OPERATION                                                         *
                        102     ; -------------------                                                         *
                        103     ; The section below describes the code generated by LX51.  LX51 generates for *
                        104     ; each function that is located in a code memory bank and called from the     *
                        105     ; common area or a different code bank and entry into the INTRABANK CALL      *
                        106     ; TABLE.  The INTRABANK CALL TABLE is located in the SEGMENT ?BANK?SELECT and *
                        107     ; listed in the Linker MAP file. The entries in that TABLE have the following *
                        108     ; format:                                                                     *
                        109     ;                                                                             *
                        110     ;   ?FCT?1:  MOV  MEX1,#n          ; Load bank number of target FCT           *
                        111     ;            LJMP FCT              ; Jump to Target Code                      *
                        112     ;                                                                             *
                        113     ; Instead of directly calling the function FCT, the Linker changes the entry  *
                        114     ; to ?FCT?1.  This entry selects the bank where the function FCT is located   *
                        115     ; and jumps to that function.                                                 *
                        116     ;******************************************************************************
                        117     
                        118     ; Standard SFR Symbols 
 00E0                   119     ACC       DATA    0E0H
 00F0                   120     B         DATA    0F0H
 0081                   121     SP        DATA    81H
 0082                   122     DPL       DATA    82H
 0083                   123     DPH       DATA    83H
                        124     
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     3

                        125     
                        126     ; Definitions for Mentor Memory Extension Hardware
 0094                   127     MEX1      DATA    94H
 0095                   128     MEX2      DATA    95H
 0096                   129     MEX3      DATA    96H
 0097                   130     MEXSP     DATA    97H
                        131     PUBLIC ?C?DPSEL
 0093                   132     ?C?DPSEL  DATA    093H
                        133     
 0008                   134     ?B_MODE         EQU     8        ; 8 for Mentor EW8051 integrated MEX Banking
 0000                   135     ?B_RST_BANK     EQU     0        ; active code bank after CPU reset
 0000                   136     ?B_IB           EQU     0        ; use Bank 0 for Interrupt Functions
 0094                   137     ?B_CURRENTBANK  EQU     MEX1     ; MEX1.4 .. 7 hold current code bank
 0004                   138     ?B_FACTOR       EQU     4        ; ?B_CURRENTBANK shift factor
 00F0                   139     ?B_MASK         EQU     0F0H     ; valid bits in ?B_CURRENTBANK
 0094                   140     ?B_MEX1         EQU     MEX1     ; address of next bank register
                        141     
                        142                     PUBLIC  ?B_NBANKS, ?B_MODE
                        143                     PUBLIC  ?B_CURRENTBANK
                        144                     PUBLIC  ?B_FACTOR, ?B_RST_BANK
                        145                     PUBLIC  ?B_IB, ?B_CB, ?B_MEX1
                        146     
                        147     
------                  148     ?C_C51STARTUP   SEGMENT   CODE
------                  149     ?STACK          SEGMENT   IDATA
                        150     
------                  151                     RSEG    ?STACK
000000                  152                     DS      1
                        153     
                        154                     EXTRN CODE (?C_START)
                        155                     PUBLIC  ?C_STARTUP
                        156     
000000                  157                     CSEG    AT      0
000000 020000     F     158     ?C_STARTUP:     LJMP    STARTUP1
                        159     
------                  160                     RSEG    ?C_C51STARTUP
                        161     
000000                  162     STARTUP1:
                        163     
                        164     IF IDATALEN <> 0
000000 787F             165                     MOV     R0,#IDATALEN - 1
000002 E4               166                     CLR     A
000003 F6               167     IDATALOOP:      MOV     @R0,A
000004 D8FD             168                     DJNZ    R0,IDATALOOP
                        169     ENDIF
                        170     
                                ENDIF
                        185     
                                ENDIF
                        189     
                                ENDIF
                        198     
                                ENDIF
                        204     
                                ENDIF
                        211     
                                ENDIF
                        216     
000006 758100     F     217                     MOV     SP,#?STACK-1
                        218     
                        219     ; Configure Memory Extension Registers
 0000                   220     MEX2VAL         SET     0
                        221     
                        222     IF ?B_CB <> 0xFF
 00B0                   223     MEX2VAL         SET     ((?B_CB AND 7) SHL 4) OR 80H
                        224     ENDIF
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     4

                        225     
 00B0                   226     MEX2VAL         SET     MEX2VAL OR ?B_IB
                        227     
000009 7595B0           228                     MOV     MEX2,#MEX2VAL
00000C 75977F           229                     MOV     MEXSP,#7FH      ; set to bottom of stack
00000F 759608           230                     MOV     MEX3,#008H      ; access XDATA by default
                        231     
000012 020000     E     232                     LJMP    ?C_START
                        233     
                        234     
                        235     IF ?B_VAR_BANKING <> 0 ;----- XDATA Variable Banking
                        236     
                        237     ;******************************************************************************
                        238     ;                                                                             *
                        239     ; THEORY OF OPERATION                                                         *
                        240     ; -------------------                                                         *
                        241     ; This section describes how the extended LX51 linker/locater manages the     *
                        242     ; extended address spaces that are addressed with the new C51 memory types    *
                        243     ; 'far' and 'far const'.  The C51 Compiler uses 3 byte pointer generic        *
                        244     ; pointer to access these memory areas.  'far' variables are placed in the    *
                        245     ; memory class HDATA and 'far const' variables get the memory class 'HCONST'. *
                        246     ; The LX51 linker/locater allows you to locate these memory classes in the    *
                        247     ; logical 16 MBYTE CODE or 16 MBYTE XDATA spaces.                             *
                        248     ;                                                                             *
                        249     ; The memory access itself is performed via eight different subroutines that  *
                        250     ; can be configured in this assembler module.  These routines are:            *
                        251     ;    ?C?CLDXPTR, ?C?CSTXPTR  ; load/store BYTE (char)  in extended memory     *
                        252     ;    ?C?ILDXPTR, ?C?ISTXPTR  ; load/store WORD (int)   in extended memory     *
                        253     ;    ?C?PLDXPTR, ?C?PSTXPTR  ; load/store 3-BYTE PTR   in extended memory     *
                        254     ;    ?C?LLDXPTR, ?C?LSTXPTR  ; load/store DWORD (long) in extended memory     *
                        255     ;                                                                             *
                        256     ; Each function gets as a parameter the memory address with 3 BYTE POINTER    *
                        257     ; representation in the CPU registers R1/R2/R3.  The register R3 holds the    *
                        258     ; memory type.  The C51 compiler uses the following memory types:             *
                        259     ;                                                                             *
                        260     ; R3 Value | Memory Type | Memory Class | Address Range                       *
                        261     ; -----------------------+--------------+--------------------------           *
                        262     ;    00    | data/idata  | DATA/IDATA   | I:0x00     .. I:0xFF                *
                        263     ;    01    | xdata       | XDATA        | X:0x0000   .. X:0xFFFF              *
                        264     ;  02..7F  | far         | HDATA        | X:0x010000 .. X:0x7E0000            *
                        265     ;  80..FD  | far const   | HCONST       | C:0x800000 .. C:0xFD0000 (see note) *
                        266     ;    FE    | pdata       | XDATA        | one 256-byte page in XDATA memory   *
                        267     ;    FF    | code        | CODE         | C:0x0000   .. C:0xFFFF              *
                        268     ;                                                                             *
                        269     ; Note: the far const memory area is mapped into the banked memory areas.     *
                        270     ;                                                                             *
                        271     ; The R3 values 00, 01, FE and FF are already handled within the C51 run-time *
                        272     ; library.  Only the values 02..FE are passed to the XPTR access functions    *
                        273     ; described below.  The AX51 macro assembler provides the MBYTE operator      *
                        274     ; that calculates the R3 value that needs to be passed to the XPTR access     *
                        275     ; function.   AX51 Assembler example for using XPTR access functions:         *
                        276     ;     MOV  R1,#LOW   (variable)   ; gives LSB address byte of variable        *
                        277     ;     MOV  R1,#HIGH  (variable)   ; gives MSB address byte of variable        *
                        278     ;     MOV  R1,#MBYTE (variable)   ; gives memory type byte of variable        *
                        279     ;     CALL ?C?CLDXPTR             ; load BYTE variable into A                 *
                        280     ;******************************************************************************
                        281     
                        282     
 0096                   283     ?C?XPAGE1SFR    EQU     MEX3             ; use MEX3 as XDATA map register
 0008                   284     ?C?XPAGE1RST    EQU     008H             ; access XDATA by default
                        285     
                        286     PUBLIC ?C?XPAGE1SFR, ?C?XPAGE1RST
                        287     PUBLIC ?C?CLDXPTR, ?C?CSTXPTR, ?C?ILDXPTR, ?C?ISTXPTR
                        288     PUBLIC ?C?PLDXPTR, ?C?PSTXPTR, ?C?LLDXPTR, ?C?LSTXPTR
                        289     
------                  290     ?C?LIB_CODE     SEGMENT CODE
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     5

------                  291                     RSEG    ?C?LIB_CODE
                        292     
                        293     LOAD_BANK       MACRO
                        294     LOCAL lab, acc_code
                        295                     MOV     DPL,A            ; Save acc
                        296                     MOV     A,R3             ; check memory type
                        297                     JB      ACC.7, acc_code  ; code is un-banked
                        298                     DEC     A
                        299                     ANL     A,#7             ; support xdata banks 0 - 7
                        300                     ORL     A,#8             ; set MXM
                        301                     MOV     ?C?XPAGE1SFR,A
                        302     acc_code:       MOV     A,DPL
                        303                     MOV     DPL,R1
                        304                     MOV     DPH,R2
                        305     
                        306                     ENDM
                        307     
                        308     
                        309     
                        310     ; CLDXPTR: Load   BYTE in A             via Address given in R1/R2/R3
                        311     
                        312     
000000                  313+1   ?C?CLDXPTR:     LOAD_BANK
000013 E0               325                     MOVX    A,@DPTR
000014 759608           326                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
000017 22               327                     RET
                        328     
                        329     ; CSTXPTR: Store  BYTE in A             via Address given in R1/R2/R3
                        330     
                        331     
000018                  332+1   ?C?CSTXPTR:     LOAD_BANK
00002B F0               344                     MOVX    @DPTR,A
00002C 759608           345     CSTCODE:        MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
00002F 22               346                     RET
                        347     
                        348     ; ILDXPTR: Load   WORD in A(LSB)/B(HSB) via Address given in R1/R2/R3 
                        349     
000030                  350+1   ?C?ILDXPTR:     LOAD_BANK
000043 E0               362                     MOVX    A,@DPTR
000044 F5F0             363                     MOV     B,A
000046 A3               364                     INC     DPTR
000047 E0               365                     MOVX    A,@DPTR
000048 759608           366                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
00004B 22               367                     RET
                        368     
                        369     ; ISTXPTR: Store  WORD in A(HSB)/B(LSB) via Address given in R1/R2/R3 
00004C                  370+1   ?C?ISTXPTR:     LOAD_BANK
00005F F0               382                     MOVX    @DPTR,A
000060 A3               383                     INC     DPTR
000061 E5F0             384                     MOV     A,B
000063 F0               385                     MOVX    @DPTR,A
000064 759608           386                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
000067 22               387                     RET
                        388     
                        389     
                        390     ; PLDXPTR: Load    PTR in R1/R2/R3      via Address given in R1/R2/R3 
000068                  391+1   ?C?PLDXPTR:     LOAD_BANK
00007B E0               403                     MOVX    A,@DPTR
00007C FB               404                     MOV     R3,A
00007D A3               405                     INC     DPTR
00007E E0               406                     MOVX    A,@DPTR
00007F FA               407                     MOV     R2,A
000080 A3               408                     INC     DPTR
000081 E0               409                     MOVX    A,@DPTR
000082 F9               410                     MOV     R1,A
000083 759608           411                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     6

000086 22               412                     RET
                        413     
                        414     ; PSTXPTR: Store   PTR in R0/A/B        via Address given in R1/R2/R3 
000087                  415+1   ?C?PSTXPTR:     LOAD_BANK
00009A C5F0             427                     XCH     A,B
00009C F0               428                     MOVX    @DPTR,A
00009D A3               429                     INC     DPTR
00009E C5F0             430                     XCH     A,B
0000A0 F0               431                     MOVX    @DPTR,A
0000A1 A3               432                     INC     DPTR
0000A2 E8               433                     MOV     A,R0
0000A3 F0               434                     MOVX    @DPTR,A
0000A4 759608           435                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
0000A7 22               436                     RET
                        437     
                        438     ; LLDXPTR: Load  DWORD in R4/R5/R6/R7   via Address given in R1/R2/R3 
0000A8                  439+1   ?C?LLDXPTR:     LOAD_BANK
0000BB E0               451                     MOVX    A,@DPTR
0000BC FC               452                     MOV     R4,A
0000BD A3               453                     INC     DPTR
0000BE E0               454                     MOVX    A,@DPTR
0000BF FD               455                     MOV     R5,A
0000C0 A3               456                     INC     DPTR
0000C1 E0               457                     MOVX    A,@DPTR
0000C2 FE               458                     MOV     R6,A
0000C3 A3               459                     INC     DPTR
0000C4 E0               460                     MOVX    A,@DPTR
0000C5 FF               461                     MOV     R7,A
0000C6 759608           462                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
0000C9 22               463                     RET
                        464     
                        465     ; LSTXPTR: Store DWORD in R4/R5/R6/R7   via Address given in R1/R2/R3 
0000CA                  466+1   ?C?LSTXPTR:     LOAD_BANK
0000DD EC               478                     MOV     A,R4
0000DE F0               479                     MOVX    @DPTR,A
0000DF A3               480                     INC     DPTR
0000E0 ED               481                     MOV     A,R5
0000E1 F0               482                     MOVX    @DPTR,A
0000E2 A3               483                     INC     DPTR
0000E3 EE               484                     MOV     A,R6
0000E4 F0               485                     MOVX    @DPTR,A
0000E5 A3               486                     INC     DPTR
0000E6 EF               487                     MOV     A,R7
0000E7 F0               488                     MOVX    @DPTR,A
0000E8 759608           489                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
0000EB 22               490                     RET
                        491     
                        492     ENDIF ; IF ?B_VAR_BANKING <> 0 ----- XDATA Variable Banking
                        493     
                        494     
                        495                     END
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     7

SYMBOL TABLE LISTING
------ ----- -------


N A M E                         T Y P E  V A L U E     ATTRIBUTES

??0001 . . . . . . . . . . . .  C  ADDR  000DH     R   SEG=?C?LIB_CODE
??0003 . . . . . . . . . . . .  C  ADDR  0025H     R   SEG=?C?LIB_CODE
??0005 . . . . . . . . . . . .  C  ADDR  003DH     R   SEG=?C?LIB_CODE
??0007 . . . . . . . . . . . .  C  ADDR  0059H     R   SEG=?C?LIB_CODE
??0009 . . . . . . . . . . . .  C  ADDR  0075H     R   SEG=?C?LIB_CODE
??000B . . . . . . . . . . . .  C  ADDR  0094H     R   SEG=?C?LIB_CODE
??000D . . . . . . . . . . . .  C  ADDR  00B5H     R   SEG=?C?LIB_CODE
??000F . . . . . . . . . . . .  C  ADDR  00D7H     R   SEG=?C?LIB_CODE
?B_CB. . . . . . . . . . . . .  N  NUMB  0003H     A   
?B_CURRENTBANK . . . . . . . .  D  ADDR  0094H     A   
?B_FACTOR. . . . . . . . . . .  N  NUMB  0004H     A   
?B_IB. . . . . . . . . . . . .  N  NUMB  0000H     A   
?B_MASK. . . . . . . . . . . .  N  NUMB  00F0H     A   
?B_MEX1. . . . . . . . . . . .  D  ADDR  0094H     A   
?B_MODE. . . . . . . . . . . .  N  NUMB  0008H     A   
?B_NBANKS. . . . . . . . . . .  N  NUMB  0004H     A   
?B_RST_BANK. . . . . . . . . .  N  NUMB  0000H     A   
?B_VAR_BANKING . . . . . . . .  N  NUMB  0001H     A   
?BANK?SWITCHING. . . . . . . .  -- ----  -------       
?C?CLDXPTR . . . . . . . . . .  C  ADDR  0000H     R   SEG=?C?LIB_CODE
?C?CSTXPTR . . . . . . . . . .  C  ADDR  0018H     R   SEG=?C?LIB_CODE
?C?DPSEL . . . . . . . . . . .  D  ADDR  0093H     A   
?C?ILDXPTR . . . . . . . . . .  C  ADDR  0030H     R   SEG=?C?LIB_CODE
?C?ISTXPTR . . . . . . . . . .  C  ADDR  004CH     R   SEG=?C?LIB_CODE
?C?LIB_CODE. . . . . . . . . .  C  SEG   0000ECH       REL=UNIT, ALN=BYTE
?C?LLDXPTR . . . . . . . . . .  C  ADDR  00A8H     R   SEG=?C?LIB_CODE
?C?LSTXPTR . . . . . . . . . .  C  ADDR  00CAH     R   SEG=?C?LIB_CODE
?C?PLDXPTR . . . . . . . . . .  C  ADDR  0068H     R   SEG=?C?LIB_CODE
?C?PSTXPTR . . . . . . . . . .  C  ADDR  0087H     R   SEG=?C?LIB_CODE
?C?XPAGE1RST . . . . . . . . .  N  NUMB  0008H     A   
?C?XPAGE1SFR . . . . . . . . .  D  ADDR  0096H     A   
?C_C51STARTUP. . . . . . . . .  C  SEG   000015H       REL=UNIT, ALN=BYTE
?C_START . . . . . . . . . . .  C  ADDR  -------       EXT
?C_STARTUP . . . . . . . . . .  C  ADDR  0000H     R   SEG=?CO?L51IBANK?3
?STACK . . . . . . . . . . . .  I  SEG   000001H       REL=UNIT, ALN=BYTE
ACC. . . . . . . . . . . . . .  D  ADDR  00E0H     A   
B. . . . . . . . . . . . . . .  D  ADDR  00F0H     A   
CSTCODE. . . . . . . . . . . .  C  ADDR  002CH     R   SEG=?C?LIB_CODE
DPH. . . . . . . . . . . . . .  D  ADDR  0083H     A   
DPL. . . . . . . . . . . . . .  D  ADDR  0082H     A   
IBPSTACK . . . . . . . . . . .  N  NUMB  0000H     A   
IBPSTACKTOP. . . . . . . . . .  N  NUMB  0100H     A   
IDATALEN . . . . . . . . . . .  N  NUMB  0080H     A   
IDATALOOP. . . . . . . . . . .  C  ADDR  0003H     R   SEG=?C_C51STARTUP
MEX1 . . . . . . . . . . . . .  D  ADDR  0094H     A   
MEX2 . . . . . . . . . . . . .  D  ADDR  0095H     A   
MEX2VAL. . . . . . . . . . . .  N  NUMB  00B0H     A   
MEX3 . . . . . . . . . . . . .  D  ADDR  0096H     A   
MEXSP. . . . . . . . . . . . .  D  ADDR  0097H     A   
PBPSTACK . . . . . . . . . . .  N  NUMB  0000H     A   
PBPSTACKTOP. . . . . . . . . .  N  NUMB  00010000H A   
PDATALEN . . . . . . . . . . .  N  NUMB  0000H     A   
PDATASTART . . . . . . . . . .  N  NUMB  0000H     A   
PPAGE. . . . . . . . . . . . .  N  NUMB  0000H     A   
PPAGE_SFR. . . . . . . . . . .  D  ADDR  00A0H     A   
PPAGEENABLE. . . . . . . . . .  N  NUMB  0000H     A   
SP . . . . . . . . . . . . . .  D  ADDR  0081H     A   
STARTUP1 . . . . . . . . . . .  C  ADDR  0000H     R   SEG=?C_C51STARTUP
XBPSTACK . . . . . . . . . . .  N  NUMB  0000H     A   
XBPSTACKTOP. . . . . . . . . .  N  NUMB  00010000H A   
AX51 MACRO ASSEMBLER  L51IBANK                                                              05/20/06 16:12:40 PAGE     8

XDATALEN . . . . . . . . . . .  N  NUMB  0000H     A   
XDATASTART . . . . . . . . . .  N  NUMB  0000H     A   


REGISTER BANK(S) USED: 0 


ASSEMBLY COMPLETE.  0 WARNING(S), 0 ERROR(S).
